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Single-event upset - Wikipedia
https://en.wikipedia.org/wiki/Single-event_upset
The SEU itself is not considered permanently damaging to the transistor's or circuits' functionality unlike the case of single-event latch-up (SEL), single-event gate rupture (SEGR), or single-event burnout (SEB). These are all examples of a  ...
Single Event Upset - an overview | ScienceDirect Topics
https://www.sciencedirect.com/topics/engineering/s ...
Single event upsets (SEUs) in circuits encompass a range of phenomena associated with the interaction of energetic particles (α particles, cosmic ... The transition to the FinFET transistor architecture appears to be positive for SER trends [111].
Introduction to Single-Event Upsets - Intel® FPGAs and ...
https://www.altera.com/literature/wp/wp-01206-intr ...
Sep 1, 2013 ... Introduction to Single-Event Upsets. This paper provides an overview of single event upsets (SEU), the capabilities ... where the electrons or holes can get collected on the source or drain of a transistor, causing the soft error.
Introduction to Single-Event Upsets - Intel
https://www.intel.com/content/dam/www/programmable ...
Sep 1, 2013 ... Introduction to Single-Event Upsets. This paper provides an overview of single event upsets (SEU), the capabilities ... where the electrons or holes can get collected on the source or drain of a transistor, causing the soft error.
Single Event Upset: An Embedded Tutorial - Auburn University
https://www.eng.auburn.edu/~agrawvd/TALKS/tutorial ...
Technology trends such as transistor down-sizing, use of new materials, and system on chip architectures continue to increase the sensitivity of systems to soft errors. These errors are random and not related to permanent hardware faults. Their ...
Single Event Upset - USGS
https://www.usgs.gov/land-resources/nli/landsat/si ...
A Single Event Upset (SEU) occurs when an energetic particle travels through a transistor substrate and causes electrical signals within the transistor. This known phenomenon often occurs in spacecraft passing through the Van Allen belts, ...
Single Event Effects Mitigation Techniques Report - FAA
https://www.faa.gov/aircraft/air_cert/design_appro ...
sensitive to SEE. Some examples of these types of effects are Single Event Upsets (SEU), Multiple Bit Upset (MBU), Single Event ... oxide-semiconductor field effect transistor (MOSFET), gate rupture, frozen bits, and noise in charge- coupled ...
Single Event Upset: An Embedded Tutorial - IEEE Xplore
http://ieeexplore.ieee.org/iel5/4450447/4450448/04 ...
Technology trends such as transistor down-sizing, use of new materials, and system on chip architectures continue to increase the sensitivity of systems to soft errors. These errors are random and not related to permanent hardware faults. Their ...
Single Event Upset (SEU) in SRAM - CiteSeerX
http://citeseerx.ist.psu.edu/viewdoc/download?doi= ...
transistor technology, single event effects are a key of research interest. As devices are downscaled, a reduction in the amount of charge held on memory storage nodes increases CMOS vulnerability to single-event upset. Single Event Effects ...
Single Event Upset (SEU) in SRAM - CiteSeerX
https://citeseerx.ist.psu.edu/viewdoc/download?doi ...
transistor technology, single event effects are a key of research interest. As devices are downscaled, a reduction in the amount of charge held on memory storage nodes increases CMOS vulnerability to single-event upset. Single Event Effects ...